Semiconductor circuitry fabrication is ever attempting to make denser and smaller circuit components. One type of circuitry where this is occurring is in the design and fabrication of memory circuitry, for example in buried bit line memory circuitry. One type of memory circuitry employing buried bit line architecture is dynamic random access memory (DRAM). Such circuitry typically includes a series of bit lines and word lines wherein at least a majority portion of the capacitors are formed elevationally above or outwardly of the bit lines.
A parasitic capacitance between buried digit lines becomes increasingly problematic as circuitry density becomes greater and circuitry components become smaller. Accordingly, alternate designs and materials are being considered for fabrication of the digit lines in highly dense circuitry fabrication, for example at and below 0.18 micron digit line width.
The invention was motivated from a desire to improve fabrication methods and constructions associated with buried bit line circuitry, and particularly buried bit line DRAM circuitry. However, the artisan will appreciate applicability of the invention to other circuitry fabrication methods and structures, with the invention only being limited by the accompanying claims appropriately interpreted in accordance with the doctrine of equivalents.